Bit Error Test & Arbitrary
Waveform Generation

Because SHF 12104 A, SHF 12105 A and SHF 12106 A Bit Pattern Generators have

1. multiple high data rate channels,
2. individually programmable channels and
3. channel synchronization

one can basically program any required output waveform from a DAC just by programming the input bits into the DAC accordingly.

Our new complementary software package, the SHF Control Center, assists the user to create the user patterns for any signal trace. With our SHF multi-channel BPG the software just needs to know which BPG output is connected to which DAC input and the arbitrary signal can be created.

Above screenshot shows how the GUI is used to configure the multi-channel BPG SHF 12105A with a 6-bit DAC to form a PAM4 waveform with non-equal amplitude eye opening and pre-emphasis for device testing requiring some degree of non-linearity compensation.

There are various options to create the waveform:

1. Load it from a file
2. Select from our library and change the parameters according to your needs
3. Use the graphical sequence editor
4. Program your waveform in our editor

One more click and the DAC will produce the desired waveform.

Generally, a Bit Pattern Generator (BPG) has some advantages over an Arbitrary Waveform Generator (AWG):

A. Baud Rate = Sample Rate
BPGs operate very broadband by tuning the input clock frequencies (SHF BPGs work from approximately 5 Gbps up to 64 Gbps). The sample rate of an AWG can be restricted to a narrow band. This becomes particularly critical when data signals (be it NRZ or PAM) are to be produced where the sample rate of the AWG is not an integer multiple of the baud rate of the data signal.
With data signal created by a BPG + DAC architecture, the baud rate and the sample rate can always be identical (1 Sample per Baud), thus no software tricks have to be applied to compensate for fractional sample to baud rate relations.

B. Logical Pattern Generation (No Memory Used)
A BPG can produce some pattern types logically, i.e. not loaded from the memory (most famously, creating NRZ PRBS patterns). This way, the patterns can be very long (up to at least 2³¹-1) and there is no up-load time (which can be quite long for long user defined patterns) as in the case of a conventional AWG relying on user-defined patterns.

In first place one may think that these advantages do only apply to pure BPG and not to an AWG based on a BPG/DAC architecture. For most microwave signals this is correct, however, for some data signals the coding can be done in the BPG hardware, thus the user memory is not used and above advantages do still apply for the signals from the DAC. Some examples are:

1.) Standard PAM
Just by applying standard PRBS signals to the DAC the DAC will create PAM4, PAM8 etc.

2.) Symmetrical unequal PAM4
In case the voltage contribution of the LSB input is exactly half of the voltage contribution of the MSB, the PAM4 signal is fully symmetric, i.e. all three eye heights are the same. This would be the standard setting of the DAC.

If the voltage contribution of the input bits deviates from half, the eye heights won’t be equal anymore. However, it will always remain symmetric. This means, in case the inner eye gets bigger the two outer eyes will be smaller but the two outer eyes will always have the same height. In the SHF DAC GUI, this is defined by the symmetry control.

3.) Non-equal amplitude PAM4
With “non-equal amplitude”, all three eye heights are different. For example, the lowest PAM eye is small, the middle is average and the upper is big (or vice versa). This is quite useful in case the DUT has a non-linear transfer characteristic (e.g. an EA modulator).
With a SHF BPG and a SHF DAC with at least 3 Bits (the more bits you use the finer you can set your different eye heights), the individual level spacing can be set just by a few SHF Control Center clicks as shown below for the case of using a 3-bit DAC.

PAM4 Amplitude Setting

Please note, for this special application, you can leave the BPG in PRBS mode and let the BPG do the recalculation of the patterns in hardware. Thus there are no such AWG drawbacks such as pattern length restriction due to memory size limit, and  waiting time when patterns are uploaded.  Our architecture can do non-equal amplitude PAM eyes with pattern length up to 2³¹-1.

4.) Pre-Emphasis
A pre-emphasis tap can be set up by generating the same data pattern twice with one being inverted and delayed (or advanced) by one bit before the patterns are added together. Delaying and inverting is a simple task for the multi-channel BPG while still being in PRBS mode. Adding together is done by the DAC. Even the amount of the pre-emphasis can be adjusted by varying the contribution of this input into the DAC.
In case enough bits are available at the DAC, this concept can be easily extended to multi-level signals and/or more pre-/de-emphasis taps.
Again, all this is done by simply generating standard PRBS patterns with the BPG and therefore “the AWG drawbacks” do not apply.